Semiconductor chips, such as semiconductor memory chips and semiconductor processor chips, generate logical high signals and logical low signals that eventually must be transmitted to one or more devices (“the load”) located off of the chip. In order to transmit these output signals to the load, the chip includes an off chip driver circuit that receives the chip's output signals and transmits these signals to the load. The driver circuit generally is fabricated using P-channel and N-channel field effect transistors (FETs) and, in particular, metal oxide semiconductor (MOS) or complementary metal oxide semiconductor (CMOS) transistors. The P-channel transistor acts as a “pull up” transistor to pull the output voltage up to the high logical level, and the N-channel transistor acts as a “pull down” transistor to pull the output voltage down to the low logical level.
The driver's output signals preferably are transmitted to the load at a drive current and output impedance appropriate to the load. Since the driver's output impedance is directly related to the driver's drive current, modifying the driver's drive current also modifies the driver's output impedance. By modifying the driver's drive current, therefore, the driver's output impedance can be set to match the input impedance of the load. A failure to match the driver's output impedance to the input impedance of the load can cause unwanted signal reflections, voltage overshoots, voltage undershoots and timing problems.
Several methods have been employed in the past for modifying the drive current of an off chip driver circuit. For example, as shown in U.S. Pat. No. 5,864,506, the off chip driver circuit may include a plurality of identical elements. Each element comprises a P-channel transistor and an N-channel transistor connected at their drains. The drain connection also serves as a terminal for the driver's output signal. The P-channel transistor of each element acts as a pull up transistor for the output signal, and the N-channel transistor of each element acts as a pull down transistor for the output signal. A selected number of these elements are activated using additional transistors and a control signal generator. Depending upon the number of such elements activated, the drive current is increased or decreased. The system disclosed in U.S. Pat. No. 5,955,894 is similar. In this system, the pull up circuit comprises a plurality of identical elements, and the pull down circuit comprises a plurality of identical elements. Each element of the pull up circuit and each element of the pull down circuit are individually activated using control logic.
A problem with these prior art systems is that the additional circuitry of the plurality of elements adds unwanted capacitance to the output impedance. Also, in order to switch rapidly between the high logical level and the low logical level (slope<1 V/ns), the circuits within the driver for the pull up and pull down paths must be oversized. This oversizing undesirably increases the DC output impedance of the driver. Also, the rapid switching generates noise on the output signal and ringing on the power buses.